Nvidia's latest roadmap was teased at Computex in Taiwan last month. Whilst details were a little light on PFLOPS and TDP for either the GPU or CPU, we did get some interesting information for the next-gen products.
- GPU: Rubin (HBM3e to HBM4 memory) - TSMC 3N process
- CPU: Vera (NVIDIA's 2nd gen ARM processor) - TSMC 3N process
- Interconnect: NVLink6 (2x performance to 3600 GB/sec)
- NIC: ConnectX9 (2x speed to 1.6Tb/sec)
- Switch: SpectrumX1600 (2x speed to support CX9 NICs)
NVIDIA appear to have moved to a tick-tock approach to releases, something Intel famously developed before their own fabs got stuck on 14nm for 6 years (2016 to 2021).
Tick–tock was a production model adopted in 2007 by chip manufacturer Intel. Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick). It was replaced by the process–architecture–optimization model, which was announced in 2016 and is like a tick–tock cycle followed by an optimization phase. As a general engineering model, tick–tock is a model that refreshes one side of a binary system each release cycle.